64 state Viterbi Encoder/Decoder

The 64 state Viterbi Encoder/Decoder is intended to be used in applications as an integrated replacement for the Qualcomm Q1900 64 State Viterbi/Trellis decoder and is provided as synthesizable Verilog HDL.  Full documentation, test benches, and Synopsys development scripts are provided. Full product information is available in an html or pdf document.

Digital Cable FEC core

The FEC core is intended for use in digital cable demodulator systems, as well as for applications such as MCNS Compliant Cable Modems and Digital Broadcast Television. Full product information is available in an html or pdf document.

HDSL-2 FEC

The HDSL-2 FEC provides encoder and decoder functionality for the emerging HDSL-2 standard.  The encoder provides a byte interface and 2's-compliment PAM symbol output.  Optional multi-rate modes are also supported, which allow a reach / rate optimization.  The decoder provides a 512 state Viterbi core, data formatting, and channel quality monitoring.   Full product information is available in an html or pdf document.

Reed - Solomon Decoder Core

    
                                            
                          
    
 

The Reed-Solomon error correction core is used in DVB, HDTV, Satellite and RF applications.  It can be used either in concatenated systems in conjunction with a Viterbi Decoder, or as an independent FEC in applications where it is necessary to correct bit errors in blocks of received data.  Full product information is available in an html or pdf document.