ASIC / Digital Design Engineers
These positions include working with the Digital group in the design and implementation of complex digital communications products.
- High level specification, block level generation, and chip level integration of digital blocks.
- Test bench generation and simulation at RTL code level and gate level.
- Logic and test synthesis of designs, including full timing analysis and formal verification of designs.
- Documentation of designs and test benches.
- BSEE or MSEE with 2-7 years experience with ASIC design.
- Good oral and written communication skills.
- Ability to work effectively in a team environment.
- Experience with Verilog, Synopsys Synthesis, UNIX scripting (PERL, CSH) is preferred.
- Knowledge of IEEE 802 standards, communications systems, and Digital Signal Processing is a plus.
We also consider highly motivated college graduates.
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